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Journal of Electrical & Electronic Systems
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Remote Calibration of Passive Wireless Microsystems: Challenge and Opportunity

Fei Yuan*
Department of Electrical and Computer Engineering, Ryerson University, Ontario, Canada
*Corresponding Author : Fei Yuan
Department of Electrical and Computer Engineering
Ryerson University, Ontario, Canada
Received May 23, 2012; Accepted May 25, 2012; Published May 25, 2012
Citation: Yuan F (2012) Remote Calibration of Passive Wireless Microsystems: Challenge and Opportunity. J Elec Electron 1:e104. doi:10.4172/2167-101X.1000e104
Copyright: © 2012 Yuan F. This is an open-access article distributed under the terms of the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original author and source are credited.

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Passive wireless microsystems typically harvest their operational power from radio-frequency waves emitted by their base station. The absence of bulky batteries not only minimizes the physical dimension and cost of these microsystems, it also removes the need for maintenance. As a result, these Microsystems can be embedded in products or implanted in living bodies permanently to provide identification, to carry out micron-scale measurement and to execute a micron-scale control action that otherwise not possible. Attributive to their small size, wireless accessibility, programmability, low-cost, and maintenance-free operation, passive wireless microsystems have found a broad range of emerging applications include implantable bio-Micro-ElectroMechanical- Systems (MEMS pressure sensors [1,2], retinal prosthetic devices [3-6], swallowable capsule endoscopy [7-9], multi-site pressure sensors for wireless arterial flow characterization [10], embedded micro-strain sensors for product performance and safety monitoring, wireless temperature sensors for human body and environmental monitoring [11-14]. Radio-Frequency Identification (RFID) tags for object tracking in logistics automation [15,16] and replacing bar codes in retailing, e-tickets, e-passports, and low-cost high-security product authentication keys to replace existing product authentication means such as holograms, water-marks, invisible barcodes, security threads, chemical, and DNA markers that are often too costly to be used for general goods [17] to name a few. The performance of passive wireless microsystems is subject to the effect of the imperfections common to all integrated circuits such as process spread, supply voltage fluctuation, and Process-Voltage-Temperature (PVT) variation. The permanent placement of these microsystems in products or living bodies, the finite operational power, and the possible exposure to the harsh environment in which passive wireless microsystems reside impose stringent constraints on both the design and calibration of these microsystems to ensure a reliable operation, proper functionality, and an adequate accuracy. The physical inaccessibility of these microsystems when embedded in products or implanted in living bodies mandates that their calibration be conducted wirelessly from their base station prior to their intended operation. This paper briefly examines the need for, challenges encountered in, and possible solutions for the remote calibration of passive wireless microsystems.
Calibration of Power Harvesting
The amount of the operational power that a passive wireless microsystem often possesses sets the maximum distance over which a reliable communication between the passive wireless microsystem and its base station can be established. It also limits the complexity subsequently the functionality of the microsystem. The efficiency that a microsystem converts the energy of an incoming radio-frequency wave to electrical power limits the amount of the power that the microsystem can harvest from the radio-frequency wave for a given time interval, and is determined by the efficiency of the antenna, the accuracy of the impedance matching network between the antenna and the voltage multiplier, the voltage gain of the impedance matching network, and the efficiency of the voltage multiplier where ac-to-dc rectification takes place. The physical dimension of the antenna sets the maximum voltage that the antenna can generate. The power efficiency of a voltage multiplier is dominated by the loss of rectifying devices [18-20]. It can be improved by either employing Schottky diodes, native MOSFET (Metal Oxide Semiconductor Field Effect Transistors) diodes, or by boosting the voltage at the input of the multiplier using passive resonators [21]. A passive resonator, typically an LC network that resonates at the carrier frequency, is usually inserted between the antenna and the voltage multiplier to perform both impedance matching for maximizing power transfer from the antenna and voltage boosting for maximizing the power efficiency of the downstream voltage multiplier [22-24]. The power efficiency of voltage multipliers can be further improved by employing a step-up transformer between the antenna and the voltage multiplier with its secondary winding resonating at the carrier frequency [25]. The quality factor of the resonator should be maximized in order to maximize its output voltage subsequently the efficiency of the downstream voltage multiplier. Arising from process spread and the effect of the change of the environment in which the microsystem resides, the resonant frequency of the resonator exhibits a large degree of uncertainty. As a result, a small deviation of the resonating frequency of the resonating network from the carrier frequency will result in a large drop of the output voltage of the resonator. This is echoed with a large reduction of the power efficiency of the downstream voltage multipliers. It is highly desirable to have an automatic on-board tuning mechanism that adjusts the resonating frequency of the resonator such that the resonator will resonate at the desired carrier frequency.
Calibration of System Clocks
The operation of both the baseband units of a passive wireless microsystem and the backscattering up-link from the microsystem to its base station are controlled by its system clock. To ensure a reliable communications between the microsystem and its base station, a stringent constraint on the frequency of the system clock exists. The system clock of a passive wireless microsystem can be directly generated from the carrier [21,26]. The need for frequency dividers to lower the clock frequency to the baseband frequency, typically in kHz or low MHz ranges, increases the power consumption. The modulation index must also be small to ensure a continuous flow of RF power to the microsystem. Baseband clock can also be obtained from the envelope of the carrier extracted from the received RF wave to take the advantage of its low power consumption and the fact that most passive wireless microsystems operate at a rather low frequency [26-28]. A common constraint of clock generation from either the carrier or the envelope is that the clock is available only when the down link is active, severely limiting the operation of the microsystem. It is generally preferred from a low-power and robustness point of view to generate the system clock of the microsystem locally using an on-chip oscillator, often a ring oscillator or a relaxation oscillator, to take advantage of their low power consumption and a large frequency tuning range. Arising from the effect of process spread, supply voltage fluctuation, and temperature variation, the frequency of the local oscillator usually exhibits a high degree of uncertainty. The timing reference required for calibrating the frequency of the local oscillator comes from the base station. The clock of the passive wireless microsystem in [11,12] is generated using an local on-chip LC oscillator that is injection-locked to the carrier of the RF wave from the base station to take the advantage of the high frequency accuracy of injection-locking. This also allows the use of a radio-frequency signal with a small modulation index thereby maximizing the amount of power flowing from the base station to the passive wireless microsystem. The downside of injection-lock based frequency calibration is a small lock range. Injection-locked activeinductor LC oscillators with devices operating in the sub-threshold mode exhibit a large frequency tuning range with an ultra low level of power consumption, offering an alternative [29]. As compared with injection-locking, phase-locked loops provide a larger frequency lock range and superior frequency accuracy, however, at the cost of high power consumption [30]. In [25] a remote frequency calibration technique using envelope based injection-locking was proposed with significantly reduced power consumption. Integrating feedback that integrates the difference between the reference frequency and the frequency of the local oscillator not only ensures high frequency accuracy but also retains the control voltage for a sufficiently long time after the injection signal is removed. The frequency of the local oscillator can also be calibrated using digital trimming [19,31-34]. A key advantage of frequency calibration using digital trimming is its large frequency tuning range, only upper-bounded only by the frequency tuning range of the oscillator. The need for a successive approximation registers, a digital-to-analog converter, and other logic for pulse counting, comparison, and control makes it difficult to lower the power consumption.
Calibration of analog-to-digital converters
Analog-to-Digital Converters (ADCs) are an essential block of passive wireless microsystems. Various ADCs are available, the lowpower constraint of passive wireless microsystems, however, only warrants a few architectures of ADCs viable for these microsystems. Charge redistribution successive approximation ADCs, time-to-digital ADCs, and incremental sigma-delta ADC offer the intrinsic advantage of low-power consumption. They are strong candidates for passive wireless microsystems.
Charge redistribution successive approximation ADCs have found increasing applications in passive wireless microsystems due to their low power consumption and a high accuracy [35-36]. Multi-stage binary weighted capacitor arrays are often used in construction of DACs to minimize both silicon and dynamic power consumption [37-38]. This, however, is at the expense of deteriorating performance mainly caused by the inaccuracy of the bridge capacitors connecting two adjacent capacitor arrays and the bottom-plate parasitic capacitance of the bridge capacitors [39-43]. The offset of the comparator also affects the accuracy of the ADCs. The SNDR (Signal-to-Noise Dynamic Range) and SFDR (Spure-Free Dynamic-Range) of a non-calibrated charge redistribution successive approximation ADC could be 10 dB and 20 dB lower respectively as compared with those of its calibrated counterpart [44]. The effect of the inaccuracy of the bridge capacitors and that of its bottom-plate parasitic capacitance of these capacitors can be mitigated by adjusting the capacitance on both sides of the bridge capacitors [45]. The effect of the offset of the comparator can also be compensated by using the dynamic offset control technique [46] to avoid the power penalty of current array-based offset compensation [47] and the speed penalty of capacitor array-based offset compensation [48]. Compensation can be made programmable from the base station with the challenge that the compensating circuitry must remain in action for the time duration in which microsystems completes analog-todigital conversion even if the calibrating signals from the base station is removed.
Oscillator-based time-do-digital ADCs employ a timing oscillator whose frequency is constant and a sensing oscillator whose frequency is a linear function of the input. For temperature measurement, the sensing oscillator is a PTAT (Proportional-To-Absolute-Temperature) oscillator whose frequency is proportional to temperature [49-51]. The accuracy of oscillator-based time-to-digital ADCs depends upon the frequency accuracy of the timing oscillator and the linearity of the sensing oscillator. The dynamic range of the ADC depends upon the ratio of the frequency of the sensing oscillator to that of the timing oscillator. It is also determined by the frequency tuning range of the sensing oscillator. Both can be adjusted remotely from the base station. The PTAT core can also be tuned remotely from the base station by varying the biasing current or other parameters. As compared with oscillator-based time-to-digital ADCs, delay-line based time-to-digital ADCs offer a key advantage of low power consumption, attribute to the absence of the power-consuming oscillator. The pulse width of the pulse generator is directly proportional to temperature, and is measured by a cyclic time-to-digital converter. The accuracy of the ADC depends upon the linearity of the PTAT line, the characteristics of the timing line, the temperature-dependent pulse width, and the minimum delay of the cyclic time-to-digital converter. The larger the pulse width and the smaller the delay of the cyclic converter, the better the resolution. To calibrate the ADC, the accuracy of the delay of the timing line needs to be calibrated first. This can be achieved by using a DLL with its reference from the base station. The delay of the cyclic time-to-digital converter can also be tuned from the base station so as to adjust the resolution of the ADC. It should be noted that although integrating ADCs such as single-slope and dual-slope ADCs offer an excellent resolution, the need for a ramp generator and a comparator makes the reduction of the power consumption of these ADCs a rather difficult task.
Incremental sigma-delta ADCs provide a high absolute accuracy in sample-by-sample conversion [52]. They provide precision conversion with high linearity obtained from the resetting of the integrator and a low offset due to the S/H of the input that allows a convenient deployment of offset compensation. In addition, the order of digital filtering for incremental ADCs is the same as the order of the incremental ADCs and is much lower as compared with that for sigmadelta ADCs, greatly reducing power consumption. The main drawback of first-order incremental sigma-delta ADCs is their low conversion speed. High-order incremental ADCs lower the conversion time without sacrificing resolution [53-56]. Similar to conventional sigmadelta ADCs, incremental ADCs are subject to the effect of the offset of the integrator caused by both mismatches and the charge injection of MOSFET switches [53]. The effect of the offset can be eliminated remotely from the base station using the approaches depicted earlier.
The need for the remote calibration of passive wireless microsystems, the challenges encountered, and potential solutions have been explored in this editorial. Remote calibrations of power harvesting, system clock generation and analog-to-digital conversion have been addressed. Research in this fast-evolving field is only in its infancy. An intensive research is needed in search for ultra-low power techniques and their silicon implementation for remote calibration of passive wireless microsystems from the base station.

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